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om .c AM7945 t4U Subscriber Line Interface Circuit ee h SCHARACTERISTICS DISTINCTIVE ta a D . w w w
s Programmable constant-current feed s Current gain = 200 s Programmable loop-detect threshold s Low power Standby state s Ground-key detector s Tip Open state for ground-start lines s -19 V to -56.5 V battery operation
s On-chip Thermal Management (TMG) feature s Two-wire impedance set by single external impedance s On-hook transmission s On-chip ring relay driver and relay snubber circuit s Ideal for low cost PABX and key telephone systems
BLOCK DIAGRAM
A(TIP)
HPA
HPB
B(RING)
m o .c U t4 e e h S ta a .D w w w
TMG Ring Relay Driver Input Decoder and Control Two-Wire Interface Ground-Key Detector Signal Transmission Off-Hook Detector Power-Feed Controller Ring-Trip Detector VCC VEE AGND/DGND
RINGOUT C1 C2 C3 E0 E1 DET
RSN VTX
DA DB VBAT BGND
om .c 4U et he aS at .D w w w
RD RDC CAS
Publication# 18408 Rev: D Amendment: /0 Issue Date: October 1999
ORDERING INFORMATION Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below.
AM7945
J
C TEMPERATURE RANGE C = Commercial (0C to 70C)*
PACKAGE TYPE J = 32-pin Plastic Leaded Chip Carrier (PL 032)
DEVICE NUMBER/DESCRIPTION AM7945 Subscriber Line Interface Circuit
Valid Combinations AM7945 JC
Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations, and to obtain additional data on AMD's standard military grade products.
Note: * Functionality of the device from 0C to +70C is guaranteed by production testing. Performance from -40C to +85C is guaranteed by characterization and periodic sampling of production units.
2
AM7945 Data Sheet
CONNECTION DIAGRAM Top View
32-Pin PLCC
B(RING) BGND A(TIP) 31
VCC
NC
NC
4 TP RINGOUT NC TMG VBAT C3 E1 C2 DET 5 6 7 8 9 10 11 12 13 14 C1
3
2
1
32
30 29 28 27 26 25 24 23 22 21 TP DA RD HPB NC HPA VTX VEE RSN
15 NC
16 E0
17 18 NC CAS
19 RDC
20 AGND/DGND
Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate. 3. NC = No Connect
SLIC Products
DB
3
PIN DESCRIPTIONS
Pin Names AGND/DGND A(TIP) BGND B(RING) C3-C1 CAS DA DB DET Gnd Output Gnd Output Input Capacitor Input Input Output Type Analog and digital ground Output of A(TIP) power amplifier Battery (power) ground Output of B(RING) power amplifier Decoder. TTL compatible. C3 is MSB and C1 is LSB. Anti-saturation pin for capacitor to filter reference voltage when operating in anti-saturation region. Ring-Trip Negative. Negative input to ring-trip comparator. Ring-Trip Positive. Positive input to ring-trip comparator. Switchhook Detector. When enabled, a logic Low indicates the selected detector is tripped. The detect condition is selected by the logic inputs (C3-C1, E0, E1). The output is opencollector with a built-in 15 k pull-up resistor. Ground-Key Enable. A logic High enables DET. A logic Low disables DET (PLCC only). Ground-Key Enable. E1 = Low connects the ground-key or ring-trip detector to DET. E1 = High connects the off-hook or ring-trip detector to DET (PLCC only). High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor. High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor. Detect Resistor. Threshold modification and filter point for the off-hook detector. DC Feed Resistor. Connection point for the DC feed current programming network. The other end of the network connects to the receiver summing node (RSN). VRDC is negative for normal polarity and positive for reverse polarity. Ring Relay Driver. Open-collector driver with emitter internally connected to BGND. Receive Summing Node. The metallic current (both AC and DC) between A(TIP) and B(RING) is equal to 200 times the current into this pin. Networks that program receive gain, two-wire impedance, and feed resistance all connect to this node. Thermal Management. Connect an external resistor between this pin and the VBAT pin to reduce on-chip power dissipation in the normal polarity, Active state only. See Table 2. Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. Battery supply +5 V power supply -5 V power supply Transmit Audio. This output is a unity gain version of the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. Description
E0 E1 HPA HPB RD RDC
Input Input Capacitor Capacitor Resistor Resistor
RINGOUT RSN
Output Input
TMG TP
-- Thermal
VBAT VCC VEE VTX
Battery Power Power Output
4
AM7945 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Storage temperature . . . . . . . . . . . . -55C to +150C With respect to AGND/DGND: VCC. . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4 V to +7.0 V VEE . . . . . . . . . . . . . . . . . . . . . . . . . . .+0.4 V to -7.0 V VBAT Continuous . . . . . . . . . . . . . . . . . . +0.4 V to -70 V 10 ms . . . . . . . . . . . . . . . . . . . . . . +0.4 V to -75 V BGND. . . . . . . . . . . . . . . . . . . . . . . . . . . .+3 V to -3 V A(TIP) or B(RING) with respect to BGND: Continuous . . . . . . . . . . . . . . . . . . . .-70 V to +1 V 10 ms (f = 0.1 Hz) . . . . . . . . . . . . . . . -70 V to +5 V 1 ms (f = 0.1 Hz) . . . . . . . . . . . . . . . . -80 V to +8 V 10 s (f = 0.1 Hz) . . . . . . . . . . . . .-100 V to +12 V Current from A(TIP) or B(RING). . . . . . . . . . 150 mA Current from TMG . . . . . . . . . . . . . . . . . . . . . 100 mA Voltage on RINGOUT: During transient . . . . . . . . . . . . . . BGND to +10 V During steady state . . . . . . . . . . . . . BGND to +7 V Current through relay drivers . . . . . . . . . . . . . . 60 mA DA and DB inputs Voltage on ring-trip inputs . . . . . . . . . . .VBAT to 0 V Current into ring-trip inputs . . . . . . . . . . . . 10 mA C3-C1, E0, E1 to AGND/DGND . . . . . . . . . -0.4 V to VCC + 0.4 V Maximum power dissipation, TA = 85C No heat sink (See note): In 32-pin PLCC package. . . . . . . . . . . . . . . . 1.4 W Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JA In 32-pin PLCC package. . . . . . . . . . . .43C/W typ
Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165C. The device should never be exposed to this temperature. Operation above 145C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices Ambient temperature . . . . . . . . . . . . . . 0C to +70C* VCC . . . . . . . . . . . . . . . . . . . . . . . . . . .4.75 V to 5.25 V VEE . . . . . . . . . . . . . . . . . . . . . . . . .-4.75 V to -5.25 V VBAT . . . . . . . . . . . . . . . . . . . . . . . . . -19 V to -56.5 V AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V BGND with respect to AGND/DGND . . . . . . . . . . . -100 mV to +100 mV Load resistance on VTX to GND . . . . . . . . 10 k min
The Operating Ranges define those limits over which the functionality of the device is guaranteed by production testing. * Functionality of the device from 0C to +70C is guaranteed by production testing. Performance from -40C to +85C is guaranteed by characterization and periodic sampling of production units.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
The AM7945 device is tested under the following conditions unless otherwise noted: BAT = -48 V, VCC = +5 V, VEE = -5 V, RL = 900 . The device is not tested in Polarity Reversal state.
Description Analog output (VTX) impedance Analog output (VTX) offset Analog (RSN) input impedance Longitudinal impedance at A or B Overload level 4-wire and 2-wire, Active state On hook, RLAC = 900 , Active or OHT state Transmission Performance 2-wire return loss (See Test Circuit D) 200 to 3.4 kHz 26 dB 4, 8 -2.5 0.95 0C to +70C -40C to +85C 300 Hz to 3.4 kHz -37 -40 1 Test Conditions (See Note 1) Min Typ 3 +37 +40 20 35 +2.5 Max Unit mV Vpk Vrms 2a 2b 4 4 Note
Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C); RL = 740 at BAT = 48 V Longitudinal to metallic L-T, L-4 normal polarity 200 Hz to 1 kHz 1 kHz to 3.4 kHz Longitudinal signal generation 4-L Longitudinal current per pin 0C to +70C -40C to +85C 0C to +70C -40C to +85C 52 50 52 50 40 20 27 mArms dB 4 4
300 Hz to 800 Hz, normal polarity Active state and OHT state
Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) BAT = -48 V, RL = 900 Gain accuracy Gain accuracy, OHT state Variation with frequency 0 dBm, 1 kHz 0C to +70C -40C to +85C -0.15 -0.20 -1.0 -0.10 -0.15 -0.10 -0.15 +0.15 +0.20 +1.0 +0.10 +0.15 +0.10 +0.15 dB 4 4 4 4 4
-10 dBm, On hook, RLAC = 900 300 to 3.4 kHz, relative to 1 kHz 0C to +70C -40C to +85C +7 dBm to -55 dBm, reference 0 dBm 0C to +70C -40C to +85C
Gain tracking
Balance Return Signal (4- to 4-Wire, See Test Circuit B) BAT = -48 V, RL = 900 Gain accuracy Variation with frequency 0 dBm, 1 kHz 0C to +70C -40C to +85C -0.15 -0.20 -0.10 -0.15 -0.10 -0.15 +0.15 +0.20 +0.10 +0.15 +0.10 +0.15 4 s 3 4 3 4 3, 4 4 4, 8
300 to 3.4 kHz, relative to 1 kHz 0C to +70C -40C to +85C +3 dBm to -55 dBm, reference 0 dBm 0C to +70C -40C to +85C f = 1 kHz
dB
Gain tracking
Group delay
Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B) BAT = -48 V, RL = 900 Harmonic distortion 300 Hz to 3.4 kHz 2-wire level = 0 dBm 2-wire level = +7 dBm -64 -55 -50 -40 dB
6
AM7945 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description Idle Channel Noise (2-Wire and 4-Wire) C-message weighted 2-wire, 4-wire, Psophometric weighted 2-wire, 4-wire, Line Characteristics, Active State (See Figure 1) Short loops, Active state Long loops, Active state OHT state Standby state BAT = -48 V, RLDC = 600 BAT = -48 V, RLDC = 1.9 k BAT = -48 V, RLDC = 600 24.7 17.5 15.5 0.7IL 15.0 IL 17.4 100 A 100 21 20 30 30 100 -7.5 40.5 -5.0 V 42.0 44 45 130 mA 20.5 mA TA = 25C 1.3IL 29.3 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C +7 +7 +7 +7 -83 -83 -83 -83 +10 +12 dBrnc +10 +12 -78 dBmp -75 4 4 4 Test Conditions (See Note 1) Min Typ Max Unit Note
V BAT - 3 V I L = -----------------------------R L + 1800
RL = 600 , BAT = -48 V TA = 70C
Loop current
Tip Open state, RL = 0 Disconnect state, RL = 0 Tip Open state, Bwire to GND Tip Open state, Bwire = BAT + 6 V
ILLIM (ITIP + IRING) Ground-start signaling (tip voltage) Open circuit voltage Power Dissipation, BAT = -48 V On hook, Open Circuit state On hook, OHT state On hook, Active state On hook, Standby state Off hook, OHT state Off hook, Active state Off hook, Standby state
Tip and ring shorted to GND Active state, RTIP to -48 V = 7.0 k RRING to GND = 100 k Active and OHT state, BAT = -48 V
25 120 RTMG = Open RTMG = 1700 160 195 35 RL = 300 , RTMG = , BAT = -48 V RL = 300 , RTMG = , BAT = -48 V RL = 300 , RTMG = RL = 600 , TA = 25C 735 1.25 0.57 0.68
100 210 230 280 100 1100 1.60 0.85 1.0 mW
W
SLIC Products
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ELECTRICAL CHARACTERISTICS (continued)
Description Supply Currents, BAT = -48 V VCC, On-hook supply current Open Circuit state OHT state Standby state Active state Open Circuit state OHT state Standby state Active state Open Circuit state OHT state Standby state Active state 1.7 4.9 2.2 6.3 0.7 2.0 0.77 2.1 0.18 1.9 0.45 4.2 2.5 7.5 3.0 8.5 2.0 3.5 2.0 5.0 1.0 4.7 1.5 5.7 Test Conditions (See Note 1) Min Typ Max Unit Note
VEE, On-hook supply current
mA
VBAT, On-hook supply current
Power-Supply Rejection Ratio (VRIPPLE = 50 mVrms), Active Normal State VCC VEE VBAT Effective internal resistance RFI rejection Off-Hook Detector Current threshold 50 Hz to 3.4 kHz 50 Hz to 3.4 kHz 50 Hz to 3.4 kHz CAS pin to GND 100 kHz to 30 MHz (See Figure E) 30 28 28 85 40 35 50 170 255 1.0 k 4 mVrms dB 5
375 I DET = -------RD
-12
+12
%
Ground-Key Detector Thresholds, Active State, BAT = -48 V Ground-key resistance threshold Ground-key current threshold Ring-Trip Detector Input Bias current Offset voltage Logic Inputs (C3-C1, E0, E1) Input High voltage Input Low voltage Input High current All inputs except C3 and E1 Input C3 Input E1 Input Low current Logic Output (DET) Output Low voltage Output High voltage IOUT = 0.8 mA IOUT = -0.1 mA 2.4 0.4 V -75 -75 -75 -0.4 2.0 V 0.8 40 200 45 mA A Source resistance = 2 M -0.5 -50 -0.05 0 +50 A mV 6 B(RING) to GND B(RING) to GND 2.0 5.0 9 10.0 k mA
8
AM7945 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description Relay Driver Output (RINGOUT) On voltage Off leakage Zener breakover Zener On voltage 35 mA sink VOH = +5 V 100 A 30 mA 6 7.2 V 10 +0.25 +0.4 100 V A Test Conditions (See Note 1) Min Typ Max Unit Note
RELAY DRIVER SCHEMATIC
RINGOUT
BGND
SWITCHING CHARACTERISTICS (32-Pin PLCC only)
Symbol Parameter E1 Low to DET High (E0 = 1) tgkde E1 Low to DET Low (E0 = 1) Ground-Key Detect state RL open, RG connected (See Figure H) Test Conditions Temperature Ranges 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C Switchhook Detect state RL = 600 , RG open (See Figure G) 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C Min Typ Max 3.8 4.0 1.1 1.6 1.1 1.6 3.8 4.0 1.2 1.7 3.8 4.0 1.1 1.6 3.8 4.0 Unit Note
tgkdd tgkd0
E0 High to DET Low (E1 = 0) E0 Low to DET High (E1 = 0) E1 High to DET Low (E0 = 1)
s
4
tshde
E1 High to DET High (E0 = 1)
tshdd tshd0
E0 High to DET Low (E1 = 1) E0 Low to DET High (E1 = 1)
SLIC Products
9
SWITCHING WAVEFORMS
E1 to DET
E1
DET
tgkde
tshde
tgkde
tshde
E0 to DET
E1
E0
DET
tshdd Note: All delays measured at 1.4 V level.
tshd0
tgkdd
tgkd0
Notes: 1. Unless otherwise noted, test conditions are VCC = +5 V, VEE = -5 V, CHP = 0.33 F, RDC1 = RDC2 = 9.26 k, CDC = 0.33 F, RD = 35.4 k, CCAS = 0.33 F, no fuse resistors, BAT = -48 V, RL = 900 , and RTMG = 1700 . 2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5% 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz with a termination impedance of 900 and an RL of 600 in production. Performance at other frequencies is guaranteed by characterization. 6. Tested with 0 source impedance. 2 M is specified for system design only. 7. Assumes the following ZT networks: (900 ): VTX 90 k 90 k 150 pF RSN (600 ): VTX 60 k 60 k 150 pF RSN
8. Group delay can be considerably reduced by using a ZT network such as that shown in Note 7 above. The network reduces the group delay to less than 2 s. The effect of group delay on the linecard performance may be compensated for by using the QSLACTM or DSLACTM device.
10
AM7945 Data Sheet
Table 1. SLIC Decoding
DET Output State 0 1 2 3 4 5 6 7 C3 C2 C1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 2-Wire Status Open Circuit Ringing Active On-Hook TX (OHT) Tip Open Standby Reserved Reserved E1 = 1 Ring trip Ring trip Loop detector Loop detector Loop detector Loop detector E1 = 0 Ring trip Ring trip Ground key Ground key Ground key Ground key
Note: E0 High enables DET.
Table 2.
Z T = 200 ( Z 2WIN - 2R F )
User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. ILOOP is the desired loop current in the constant-current region.
ZL 200 * Z T Z RX = ---------- * -----------------------------------------------------G 42L Z T + 200 ( Z L + 2 * R F ) 500 R DC1 + R DC2 = ------------I LOOP R DC1 + R DC2 C DC = 1.5 ms * ------------------------------R DC1 * R DC2 375 R D = -------- , IT 0.5 ms C D = ---------------RD
RD and CD form the network connected from RD to -5 V and IT is the threshold current between on hook and off hook. OHT loop current (constant-current region).
500 V * 0.66 I OHT = ------------------------------R DC1 + R DC2 1 C CAS = ---------------------------5 3.4 * 10 f c
CCAS is the regulator filter capacitor and fc is the desired filter cutoff frequency.
Thermal Management Equations (Normal Active and Tip Open States)
V BAT - 6 V R TMG ------------------------------ILOOP V BAT - 6 V - ( I L * R L ) P RTMG = ------------------------------------------------------------R TMG
2
RTMG is connected from TMG to VBAT and is used to limit power dissipation within the SLIC in Normal Active and Tip Open states only. Power dissipated in the TMG resistor, RTMG, during Active and Tip Open states.
2
P SLIC = V BAT * I L - ( P RTMG - R L ( I L ) ) + 0.12 W
Power dissipated in the SLIC while in Active and Tip Open states.
SLIC Products
11
DC FEED CHARACTERISTICS
3 VBAT = -51.3 V VBAT = -47.3 V 4 2
1
RDC1 + RDC2 = RDC = 18.52 k
Active state OHT state
Notes: 1. Constant-current region: Active state:
500 I L = --------R DC 2 500 I L = -- * --------3 R DC V AB = 1.017 V BAT - 10.7 V AB = 1.017 V BAT - 6.3 R DC V AB = 1.017 V BAT - 6.3 - I L --------120
OHT state:
2. Anti-sat (battery tracking) turn-on: 3. Open circuit voltage: 4. Anti-sat (battery tracking) region:
a. VA-VB (VAB) Voltage vs. Loop Current (Typical)
12
AM7945 Data Sheet
DC FEED CHARACTERISTICS (continued)
30
25
Loop Current (mA)
20
15
10
5
0 0 1000 2000 3000 Load Resistance () 4000 5000 6000
RDC1 + RDC2 = RDC = 18.52 k VBAT = -47.3 V
b. Loop Current vs. Load Resistance (Typical)
A
a RL b IL SLIC
RSN RDC1
RDC2 RDC B
CDC
Feed current programmed by RDC1 and RDC2 c. Feed Programming
Figure 1.
DC Feed Characteristics
SLIC Products
13
TEST CIRCUITS
A(TIP) RL 2 VL RL 2 B(RING) IL2-4 = 20 log (VTX / VAB) RSN VAB SLIC AGND RT RRX VAB RL VTX
A(TIP)
VTX
SLIC RT
AGND
RRX B(RING) RSN IL4-2 = 20 log (VAB / VRX) BRS = 20 log (VTX / VRX) VRX
A. Two- to Four-Wire Insertion Loss
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
1 C
ZD << RL RL 2 S1 C VL VL RL 2 B(RING) RSN VRX VAB SLIC AGND RT S2 RRX VS A(TIP) VTX R SLIC AGND VM RT2 ZIN B(RING) RSN RRX CT1 A(TIP) VTX RT1
R
S2 Open, S1 Closed L-T Long. Bal. = 20 log (VAB / VL) L-4 Long. Bal. = 20 log (VTX / VL) S2 Closed, S1 Open 4-L Long. Sig. Gen. = 20 log (VL / VRX) C. Longitudinal Balance
Note: ZD is the desired impedance (e.g., the characteristic impedance of the line). RL = -20 log (2 VM / VS)
D. Two-Wire Return Loss Test Circuit
14
AM7945 Data Sheet
TEST CIRCUITS (continued)
L1 C1 RF1 A(TIP)
200
50
CAX 33 nF
HF GEN
200 50
L2
50
RF2 CBX 33 nF B(RING) VTX SLIC under test
C2
1.5 Vrms 80% Amplitude Modulated 100 kHz to 30 MHz E. RFI Test Circuit
VCC 6.2 k A(TIP)
A(TIP) DET RL = 600 15 pF RG B(RING) E1 B(RING) 2 k at VBAT = -48 V
F. Loop-Detector Switching
G. Ground-Key Switching
SLIC Products
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TEST CIRCUITS (continued)
+5 V -5 V DA VCC VEE RD RD 2.2 nF A(TIP) CHP B(RING) 2.2 nF RDC CDC RINGOUT HPB B(RING) A(TIP) HPA RSN RDC2 RT RRX VRX RDC1 VTX VTX
DB
AGND/ DGND BGND E1 C3 C2 C1 DET TMG RTMG 1700 CCAS DIGITAL GROUND CAS ANALOG GROUND
BAT D6
VBAT
BATTERY GROUND
H. AM7945 Test Circuit
16
AM7945 Data Sheet
PHYSICAL DIMENSION
PL032
.447 .453 .485 .495 .009 .015 .125 .140 .080 .095 SEATING PLANE .400 REF. .013 .021 .026 .032 TOP VIEW .050 REF. .490 .530 .042 .056
.585 .595 .547 .553
Pin 1 I.D.
SIDE VIEW
16-038FPO-5 PL 032 DA79 6-28-94 ae
REVISION SUMMARY Revision A to B
* * Minor changes were made to the data sheet style and format to conform to AMD standards. In the Pin Description table, inserted/changed TP pin description to: "Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation." Deleted information on the Ceramic DIP and Plastic DIP packages. The PL032 package was added to the new Physical Dimension section. Updated the Pin Description table to correct inconsistencies.
Revision B to Revision C
Revision C to Revision D
* * *
SLIC Products
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The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD's Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice.
(c) 1999 Advanced Micro Devices, Inc. All rights reserved.
Trademarks AMD, the AMD logo, and combinations thereof, and DSLAC and QSLAC are trademarks of Advanced Micro Devices, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

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